The trend in electronic components has lead to the development of integrated circuits (ICs) that have higher operating frequencies and require less power per gate. This has been achieved in part by a reduction in the feature sizes that make up the transistors and wires that comprise the ICs. As a consequence, the amount of charge that is required to store a bit of information is about one-tenth of a pico-coulomb (pC), or about 600,000 electrons. Because the amount of charge is so small, cosmic rays can deposit enough charge in an IC to cause a single-event upset (SEU) and alter the state of the memory bit.
The importance of cosmic rays on the performance of integrated circuits in a space environment is evident in the upset rates of various satellites and spacecraft. For example, the Tracking and Data Relay satellite experiences a single event upset per day, which must be corrected from the ground. Such adverse experiences have caused a re-design of spacecraft, such as the Galileo spacecraft. The characterization of digital ICs to heavy ion induced upsets is essential for qualifying their use in critical systems to be used on spacecraft. This characterization usually requires evaluations at an ion source, such as a cyclotron. Such evaluations are time consuming, expensive and error prone. In recent years, laser pulses have been proposed as substitutes for the heavy ion sources. However, the laser simulations are limited by metal layers that frequently block the laser pulses from SEU-sensitive nodes and by the complexity of the ion-photon calibrations. The solution to the single event upset problem continues to be important, as the complexity of spacecraft grows, the size of integrated circuits decrease and as space systems are designed with circuits fabricated at non-radiation hardened foundries.
Thus it would be highly desireable to have a method for bench-level characterization of an IC such as a CMOS standard-cell D-latch, without requiring the use of large and expensive heavy ion sources.